R&D UNIT

National Chiao Tung University

Distinguished Professor Kuan-Neng Chen; Chair Professor Chenming Hu; Professor Po-Tsang Huang

Technical  Introduction

The location of controlled-grain Si island is determined by the pattern of “cooling holes”. The grain size is determined by the distance between “holes” due to lateral grain growth using pulse laser crystallization. This predictability allows the transistors and circuits to stay away from the grain boundaries for monolithic 3D-IC.

Scientific Breakthrough

Monolithic  3D  integration  provides  efficient  connectivity  of  circuits  and  decrease  power  consumption,  enhance system performance and reduce chip size. A BEOL location-controlled technique using pulse laser anneal process for fabricating monolithic 3D FinFET circuits within Si grains is proposed. Spatially separating devices and grain boundaries provides a promising solution for developing practical monolithic 3D-IC.

Industrial Application

Monolithic 3D integration is an emerging and promising technology that offers a path for high performance, high connectivity, multi-function, smaller form factor, and potential cost reduction. It is appropriated for the development of IoT devices and for the design of neuromorphic computing.