Research project principal investigator: Prof. Ke-Horng Chen
Student Thottempudi Nagateja and Kabita Mahato are expected to graduate next year at the earliest under the joint guidance(Indian Institute of Technology, Madras). In the process of participating in this project, they had a deep and extensive understanding of the upcoming problems in chip design, and learned the corresponding solutions. At the same time, through studying related technologies and conference/journal papers, they learned about the research methods and results of other advanced chip design research teams in the world. In addition, they had improved their skills in power electronics, power integrated circuits, electronics, and mixed signal integrated circuit design during the implementation of this project, including problem discovery and modeling, circuit design, and IC implementation, testing, chip layout and use of electronic design automation software, etc.
In terms of international conference papers, one paper has been published in the world''''''''''''''''s most indicative solid-state circuit international conference 2020 IEEE International Solid- State Circuits Conference (ISSCC), and two papers have been published in 2020 IEEE International Symposium of Circuits and Systems ( ISCAS), one paper was published in 2020 Symposia on VLSI Technology and Circuits (VLSI), and there are three more papers accepted by ISSCC 2021 and will be published in the seminar in February next year.
In terms of international journals, two papers have been published in the top international journal IEEE Transactions on Power Electronics this year, and there’s another paper accepted by the same journal and will be published in March next year.
In addition, due to this project, there are other institutes that are willing to subsidize us to invite foreign lecturers to give short term courses at Chiao Tung University.