Collaborating with Industrial Technology Research Institute, National Yang Ming Chiao Tung University established a new record for in-memory computing

Institute of Electronics     2021/10/25
The team led by Professor Tuo-Hung Hou (third from the right) has been deeply involved in in-memory computing technology for many years. Through the cross-level co-design of memory devices, memory circuits, and artificial intelligence algorithms, the performance of in-memory computing has been improved step by step. The picture shows a group photo of the team and ITRI partners.
  • INDUSTRY, INNOVATION, AND INFRASTRUCTURE
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  • The team led by Professor Tuo-Hung Hou (third from the right) has been deeply involved in in-memory computing technology for many years. Through the cross-level co-design of memory devices, memory circuits, and artificial intelligence algorithms, the performance of in-memory computing has been improved step by step. The picture shows a group photo of the team and ITRI partners.

The memory device is an indispensable hardware unit for storing data in computer systems, but now the new generation of intelligent memory has more applications! Not only can data be stored, but also a huge amount of computing operations can be executed. It combines storage and computing in the same memory, similar to a human brain. Such in-memory computing architecture mimics the biological neural networks in the brain and is the future hope for realizing high-performance and low-power artificial intelligence (AI).

The research team, led by Prof. Tuo-Hung Hou from the Institute of Electronics, National Yang Ming Chiao Tung University (NYCU), has been working on in-memory computing technology for many years. Through the cross-layer design of memory devices, memory circuits, and artificial intelligence algorithms, the efficiency of in-memory computing has been improved step by step. In this year’s IEEE Asian Solid State Circuits Conference (IEEE A-SSCC), NYCU and Industrial Technology Research Institute (ITRI) jointly reported the world’s most energy-efficient in-memory ternary convolution neural network (ternary CNN) accelerator chip using the commercial 28-nanometer process technology. Power consumption per watt can perform more than 20,000 trillion AI operations per second (20943 TOPS/W), which is 3.7 times higher than state-of-the-art, and the area efficiency is also increased by 4.5 times, setting a new performance record for in-memory computing. Through the cross-layer design, this chip also overcomes inevitable computing errors existing in in-memory computing, demonstrating extremely low-power and highly accurate voice keyword recognition capabilities. At present, the team is working closely with ITRI to bring this technology into commercial products, such as intelligent Bluetooth earbuds.

 
“One of the major bottlenecks in AI is the performance of computing hardware, which is also the main reason why AI computing cannot be completely deployed to personal mobile devices from data centers.” Prof. Hou said. Because of its high energy efficiency, in-memory computing is a destructive technology that is currently the focus of many IC design and memory companies in the world. However, its true potential has not yet been realized. This new result fully demonstrated the advantages of in-memory computing. The use of matured semiconductor process technology makes the introduction of this technology into commercial products easier. “I believe that after a few years of hard work, building an AI computing hardware that is as efficient as the human brain will no longer be an unattainable dream.” Prof. Hou said.